Design IP for Analog and RFCMOS Process Characterization and Performance Optimization

The performance of analog and RF circuitry is increasingly sensitive to deep sub-micron manufacturing. Standard devices that are well characterized and modeled are essential to realize stable, working designs without silicon iterations. Potential tradeoffs of device performance for lower processing cost must also be carefully assessed. A methodology and supporting circuit and device IP is described here which facilitates cost-effective RF and analog device integration and accurate modeling.